This paper presents a novel approach to automated behavioural level test program generation for microprocessors using the model of high-level decision diagrams (HLDD) for representing instruction sets. The methodology of using HLDDs for modelling of microprocessors, and a new HLDD-based fault model are developed. The procedures for automated test program generation are presented using a formal model of HLDDs. The feasibility and efficiency of the new methodology are demonstrated by carrying out experimental research on test generation for a 8-bit microprocessor. The results are promising, showing the advantages of the new method and demonstrating better quality of tests compared to previous results.
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